A Dynamically Reconfigurable Video Compression Scheme Using FPGAs with Coarse-grain Parallelism

Author： Ramachandran S.   Srinivasan S.  

Publisher： Taylor & Francis Ltd

ISSN： 1065-514X

Source： VLSI Design, Vol.15, Iss.2, 2002-01, pp. : 521-528

Disclaimer: Any content in publications that violate the sovereignty, the constitution or regulations of the PRC is not accepted or approved by CNPIEC.

Previous Menu Next

Abstract

Related content

A coarse-grain reconfigurable architecture for multimedia applications featuring subword computation capabilities

By Brunelli Claudio  

Journal of Real-Time Image Processing, Vol. 3, Iss. 1-2, 2008-03 ,pp. : 21-32

Springer Publishing Company

Access to resources Recommend Favorite

A Perceptual Encryption Scheme for HEVC Video with Lossless Compression

By  

International Journal of Digital Crime and Forensics (IJDCF), Vol. 10, Iss. 1, 2018-01 ,pp. : 67-78

IGI Global_journal

Access to resources Recommend Favorite

Online placement for dynamically reconfigurable devices

By Ahmadinia Ali   Bobda Christophe   Teich Jurgen  

International Journal of Embedded Systems, Vol. 1, Iss. 3-4, 2006-06 ,pp. : 165-178

Inderscience Publishers

Access to resources Recommend Favorite

The Hypercube as a Dynamically Reconfigurable Processor Mesh

By Joy J.M.   Bergeron R.D.  

Journal of Parallel and Distributed Computing, Vol. 48, Iss. 1, 1998-01 ,pp. : 130-142

Academic Press

Access to resources Recommend Favorite

Improved Video Compression using Perceptual Modeling

By Shaw Mark Q.   Parra Albert   Allebach Jan P.  

Color and Imaging Conference, Vol. 2012, Iss. 1, 2012-01 ,pp. : 9-14

Society for Imaging Science and Technology

Access to resources Recommend Favorite