Using the models of incompletely specified Boolean functions in the synthesis of schemes by VHDL descriptions

ISSN： 1063-7397

Source： Russian Microelectronics, Vol.42, Iss.5, 2013-09, pp. : 314-323

Disclaimer: Any content in publications that violate the sovereignty, the constitution or regulations of the PRC is not accepted or approved by CNPIEC.

Previous Menu Next

Abstract

Related content

Logic synthesis from VHDL descriptions using LeonardoSpectrum: Theoretical basis

By Bibilo P.

Russian Microelectronics, Vol. 34, Iss. 6, 2005-11 ,pp. : 397-406

MAIK Nauka/Interperiodica

Access to resources Recommend Favorite

A new approach to generate fixed-polarity Reed-Muller expansions for completely and incompletely specified functions

By Habib Maki K.

International Journal of Electronics, Vol. 89, Iss. 11, 2002-11 ,pp. : 845-876

Taylor & Francis Ltd

Access to resources Recommend Favorite

FPGA Synthesis of VHDL OFDM System

By Mohamed M.

Wireless Personal Communications, Vol. 70, Iss. 4, 2013-06 ,pp. : 1885-1909

Springer Publishing Company

Access to resources Recommend Favorite

Multi-Level Fault Injections in VHDL Descriptions: Alternative Approaches and Experiments

By Leveugle R.

Journal of Electronic Testing, Vol. 19, Iss. 5, 2003-10 ,pp. : 559-575

Springer Publishing Company

Access to resources Recommend Favorite

PRALU-to-VHDL conversion of parallel-algorithm descriptions for control units

By Bibilo P.

Russian Microelectronics, Vol. 35, Iss. 4, 2006-07 ,pp. : 262-275

MAIK Nauka/Interperiodica

Access to resources Recommend Favorite