Low-Power Design of Nanometer FPGAs :Architecture and EDA ( Systems on Silicon )

Publication subTitle :Architecture and EDA

Publication series :Systems on Silicon

Author: Hassan   Hassan;Anis   Mohab  

Publisher: Elsevier Science‎

Publication year: 2009

E-ISBN: 9780080922348

P-ISBN(Paperback): 9780123744388

P-ISBN(Hardback):  9780123744388

Subject: TN4 microelectronics, integrated circuit (IC)

Language: ENG

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Description

Low-Power Design of Nanometer FPGAs Architecture and EDA is an invaluable reference for researchers and practicing engineers concerned with power-efficient, FPGA design. State-of-the-art power reduction techniques for FPGAs will be described and compared. These techniques can be applied at the circuit, architecture, and electronic design automation levels to describe both the dynamic and leakage power sources and enable strategies for codesign.

  • Low-power techniques presented at key FPGA design levels for circuits, architectures, and electronic design automation, form critical, "bridge" guidelines for codesign
  • Comprehensive review of leakage-tolerant techniques empowers designers to minimize power dissipation
  • Provides valuable tools for estimating power efficiency/savings of current, low-power FPGA design techniques

Chapter

Front Cover

pp.:  1 – 4

Title Page

pp.:  4 – 5

Copyright Page

pp.:  5 – 6

Dedication Page

pp.:  6 – 8

Table of Contents

pp.:  8 – 14

Author Bios

pp.:  14 – 16

Chapter 1. FPGA Overview: Architecture and CAD

pp.:  16 – 46

Chapter 2. Power Dissipation in Modern FPGAs

pp.:  46 – 56

Chapter 3. Power Estimation in FPGAs

pp.:  56 – 100

Chapter 4. Dynamic Power Reduction Techniques in FPGAs

pp.:  100 – 154

Chapter 5. Leakage Power Reduction in FPGAs Using MTCMOS Techniques

pp.:  154 – 210

Chapter 6. Leakage Power Reduction in FPGAs Through Input Pin Reordering

pp.:  210 – 236

References

pp.:  236 – 252

Index

pp.:  252 – 258

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