Embedded DSP Processor Design :Application Specific Instruction Set Processors ( Volume 2 )

Publication subTitle :Application Specific Instruction Set Processors

Publication series :Volume 2

Author: Liu   Dake  

Publisher: Elsevier Science‎

Publication year: 2008

E-ISBN: 9780080569871

P-ISBN(Paperback): 9780123741233

P-ISBN(Hardback):  9780123741233

Subject: TP331.2 Digital Circuits

Language: ENG

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Description

This book provides design methods for Digital Signal Processors and Application Specific Instruction set Processors, based on the author's extensive, industrial design experience. Top-down and bottom-up design methodologies are presented, providing valuable guidance for both students and practicing design engineers.

Coverage includes design of internal-external data types, application specific instruction sets, micro architectures, including designs for datapath and control path, as well as memory sub systems. Integration and verification of a DSP-ASIP processor are discussed and reinforced with extensive examples.

  • Instruction set design for application specific processors based on fast application profiling
  • Micro architecture design methodology
  • Micro architecture design details based on real examples
  • Extendable architecture design protocols
  • Design for efficient memory sub systems (minimizing on chip memory and cost)
  • Real example designs based on extensive, industrial experiences

Chapter

Front Cover

pp.:  1 – 4

Copyright Page

pp.:  5 – 8

Table of Contents

pp.:  8 – 20

Preface

pp.:  20 – 26

Chapter 1. Introduction

pp.:  28 – 74

Chapter 2. Numerical Representation and Finite-Length DSP

pp.:  74 – 114

Chapter 3. DSP Architectures

pp.:  114 – 186

Chapter 4. DSP ASIP Design Flow

pp.:  186 – 214

Chapter 5. A Simple DSP Core—The Junior Processor

pp.:  214 – 244

Chapter 6. Code Profiling for ASIP Design

pp.:  244 – 266

Chapter 7. Assembly Instruction Set Design

pp.:  266 – 342

Chapter 8. Software Development Toolchain

pp.:  342 – 384

Chapter 9. Evaluation of an Instruction Set

pp.:  384 – 396

Chapter 10. Design of DSP Microarchitecture

pp.:  396 – 426

Chapter 11. Design of Register File and Register Bus

pp.:  426 – 440

Chapter 12. ALU HW Implementation

pp.:  440 – 466

Chapter 13. MAC Hardware Implementation

pp.:  466 – 502

Chapter 14. Control Path Design

pp.:  502 – 540

Chapter 15. Design of Memory Subsystems

pp.:  540 – 574

Chapter 16. DSP Core Peripherals

pp.:  574 – 624

Chapter 17. Design for DSP Functional Acceleration

pp.:  624 – 646

Chapter 18. Real-time Fixed-point DSP Firmware

pp.:  646 – 690

Chapter 19. ASIP Integration and Verification

pp.:  690 – 732

Chapter 20. Parallel Streaming Signal Processing

pp.:  732 – 788

Glossary

pp.:  788 – 796

Appendix A. Senior Assembly InstructionSet Manual

pp.:  796 – 798

Index

pp.:  798 – 806

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