Demystifying Chipmaking

Author: Yanda   Richard F.;Heynes   Michael;Miller   Anne  

Publisher: Elsevier Science‎

Publication year: 2005

E-ISBN: 9780080477091

P-ISBN(Paperback): 9780750677608

P-ISBN(Hardback):  9780750677608

Subject: TM Electrotechnical;TN4 microelectronics, integrated circuit (IC);TN43 The semiconductor integrated circuit (ssc)

Language: ENG

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Description

This book takes the reader through the actual manufacturing process of making a typical chip, from start to finish, including a detailed discussion of each step, in plain language. The evolution of today's technology is added to the story, as seen through the eyes of the engineers who solved some of the problems. The authors are well suited to that discussion since they are three of those same engineers. They have a broad exposure to the industry and its technology that extends all the way back to Shockley Laboratories, the first semiconductor manufacturer in Silicon Valley.

The CMOS (Complementary Metal-Oxide-Semiconductor) process flow is the focus of the discussion and is covered in ten chapters. The vast majority of chips made today are fabricated using this general method. In order to ensure that all readers are comfortable with the vocabulary, the first chapter carefully and clearly introduces the science concepts found in later chapters. A chapter is devoted to pointing out the differences in other manufacturing methods, such as the gallium arsenide technology that produces chips for cell phones. In addition, a chapter describing the nature of the semiconductor industry from a business perspective is included.

"The entire process of making a chip is surprisingly easy to understand. The part of the story that defies belief is the tiny dimensions: the conducting wires and other structures on a chip are more than a hundred times thinner than a hair - and get

Chapter

Cover

pp.:  1 – 5

Contents

pp.:  5 – 11

Foreword

pp.:  11 – 13

Acknowledgments

pp.:  13 – 15

About the Authors

pp.:  15 – 19

Chapter 1: IC Fabrication Overview

pp.:  19 – 47

Chapter 2: Support Technologies

pp.:  47 – 81

Chapter 3: Forming Wells

pp.:  81 – 111

Chapter 4: Isolate Active Areas (Shallow Trench Isolation)

pp.:  111 – 147

Chapter 5: Building the Transistors

pp.:  147 – 175

Chapter 6: First Level Metallization

pp.:  175 – 207

Chapter 7: Multilevel Metal Interconnects and Dual Damascene

pp.:  207 – 225

Chapter 8: Test and Assembly

pp.:  225 – 237

Appendix A: Science Overview

pp.:  237 – 263

Appendix B: Plasma Etch Supplement to Chapter 4

pp.:  263 – 269

Bibliography

pp.:  269 – 271

Index

pp.:  271 – 277

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