Analysis of non-ideal effects in coupled VLSI interconnects with active and passive load variations

Author： Khanna Gargi   Chandel Rajeevan   Chandel Ashwani Kumar   Sarkar Sankar  

Publisher： Emerald Group Publishing Ltd

ISSN： 1356-5362

Source： Microelectronics International, Vol.26, Iss.1, 2009-01, pp. : 3-9

Disclaimer: Any content in publications that violate the sovereignty, the constitution or regulations of the PRC is not accepted or approved by CNPIEC.

Previous Menu Next

Abstract

Related content

Crosstalk analysis and repeater insertion in crosstalk aware coupled VLSI interconnects

By Kaushik Brajesh Kumar   Sarkar Sankar   Agarwal R.P.   Joshi R.C.  

Microelectronics International, Vol. 23, Iss. 3, 2006-09 ,pp. : 55-63

Emerald Group Publishing Ltd

Access to resources Recommend Favorite

Effects of process variation in VLSI interconnects ‐ a technical review

By Verma K.G.   Kaushik B.K.   Singh R.  

Microelectronics International, Vol. 26, Iss. 3, 2009-07 ,pp. : 49-55

Emerald Group Publishing Ltd

Access to resources Recommend Favorite

Repeater stage timing analysis for VLSI resistive interconnects

By Chandel Rajeevan   Sarkar S.   Agarwal R.P.  

Microelectronics International, Vol. 23, Iss. 3, 2006-09 ,pp. : 19-25

Emerald Group Publishing Ltd

Access to resources Recommend Favorite

Full-wave modelling and broadband characterization of coupled interconnects in high-speed VLSI

By Yuan Zheng-Yu   Li Zheng-Fan   Zou Min-Liu  

International Journal of Electronics, Vol. 87, Iss. 7, 2000-07 ,pp. : 841-852

Taylor & Francis Ltd

Access to resources Recommend Favorite

Effect of line resistance and driver width on crosstalk in coupled VLSI interconnects

By Kaushik Brajesh Kumar   Sarkar Sankar   Agarwal R.P.   Joshi R.C.  

Microelectronics International, Vol. 24, Iss. 3, 2007-07 ,pp. : 42-45

Emerald Group Publishing Ltd

Access to resources Recommend Favorite