Peak current failure levels in ESD sensitive semiconductor devices and their application in evaluation of materials used in ESD protection. Part 1: Theoretical analysis

Publisher： IOP Publishing

ISSN： 1742-6596

Source： Journal of Physics: Conference Series , Vol.142, Iss.1, 2008-12, pp. : 283-286

Access to resources Favorite

Disclaimer: Any content in publications that violate the sovereignty, the constitution or regulations of the PRC is not accepted or approved by CNPIEC.

Previous Menu Next

Abstract

Related content

Peak current failure levels in ESD sensitive semiconductor devices and their application in evaluation of materials used in ESD protection. Part 2: Experimental verification

By  

Journal of Physics: Conference Series , Vol. 142, Iss. 1, 2008-12 ,pp. : 31-36

IOP Publishing

Access to resources Recommend Favorite

Novel substrate trigger SCR-LDMOS stacking structure for high-voltage ESD protection application

By Jin-Rong Ma   Qiao Ming   Bo Zhang  

Chinese Physics B, Vol. 24, Iss. 4, 2015-04 ,pp. : 47303-47307

IOP Publishing

Access to resources Recommend Favorite

Advanced risk analysis of systems endangered by ESD

By  

Journal of Physics: Conference Series , Vol. 142, Iss. 1, 2008-12 ,pp. : 165-168

IOP Publishing

Access to resources Recommend Favorite

An improved GGNMOS triggered SCR for high holding voltage ESD protection applications

By Shuai Zhang   Shu-Rong Dong   Xiao-Jing Wu   Jie Zeng   Lei Zhong   Jian Wu  

Chinese Physics B, Vol. 24, Iss. 10, 2015-10 ,pp. : 108502-108504

IOP Publishing

Access to resources Recommend Favorite

Electrostatic discharge attenuation test for the characterization of ESD protective materials

By  

Journal of Physics: Conference Series , Vol. 142, Iss. 1, 2008-12 ,pp. : 185-188

IOP Publishing

Access to resources Recommend Favorite