A simulated model for cycle time reduction by acquiring optimal lot size in semiconductor manufacturing

Author: Wang Chia-Nan   Wang Chih-Hong  

Publisher: Springer Publishing Company

ISSN: 0268-3768

Source: The International Journal of Advanced Manufacturing Technology, Vol.34, Iss.9-10, 2007-10, pp. : 1008-1015

Disclaimer: Any content in publications that violate the sovereignty, the constitution or regulations of the PRC is not accepted or approved by CNPIEC.

Previous Menu Next