A 400 MHz–1.5 GHz all digital integer-N PLL with a reference spur reduction technique

Author： Song Junyoung Hwang Sewook Kim Tae-Chan Kim Chulwoo

ISSN： 0925-1030

Source： Analog Integrated Circuits and Signal Processing, Vol.79, Iss.1, 2014-04, pp. : 183-189

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