Chapter
2.2 REQUIREMENTS OF A PROGRAM FOR GENERAL USE
2.2 REQUIREMENTS OF A PROGRAM FOR GENERAL USE
2.4 REPRESENTATION OF A CIRCUIT WITHIN THE COMPUTER
2.4 REPRESENTATION OF A CIRCUIT WITHIN THE COMPUTER
2.5 DESCRIPTION OF GCAP2 FACILITIES
2.5 DESCRIPTION OF GCAP2 FACILITIES
2.6 EXAMPLES OF PROGRAM USE
2.6 EXAMPLES OF PROGRAM USE
CHAPTER 3. A d.c. Analysis Program
CHAPTER 3. A d.c. Analysis Program
CHAPTER 4. Device Modelling
CHAPTER 4. Device Modelling
4.2 GENERAL LINEAR MODELLING
4.2 GENERAL LINEAR MODELLING
4.3 LINEAR TRANSISTOR MODELS
4.3 LINEAR TRANSISTOR MODELS
4.4 NON-LINEAR TRANSISTOR MODELS
4.4 NON-LINEAR TRANSISTOR MODELS
CHAPTER 5. Non-linear Transient Analysis (1)
CHAPTER 5. Non-linear Transient Analysis (1)
5.2 INTEGRATION TECHNIQUE – LINEAR RISE METHODS
5.2 INTEGRATION TECHNIQUE – LINEAR RISE METHODS
5.3 CONSTRUCTION OF THE PROGRAM
5.3 CONSTRUCTION OF THE PROGRAM
5.4 AN EXCURSION THROUGH THE PROGRAM
5.4 AN EXCURSION THROUGH THE PROGRAM
5.5 OTHER NON-LINEAR ELEMENTS
5.5 OTHER NON-LINEAR ELEMENTS
5.7 FURTHER APPLICATION EXAMPLE OF THE PROGRAM
5.7 FURTHER APPLICATION EXAMPLE OF THE PROGRAM
CHAPTER 6. Non-linear Transient Analysis (2)
CHAPTER 6. Non-linear Transient Analysis (2)
6.2 FINITE DIFFERENCE EXPRESSIONS FOR THE V–I RELATIONS OF L AND C
6.2 FINITE DIFFERENCE EXPRESSIONS FOR THE V–I RELATIONS OF L AND C
6.3 GENERATION AND SOLUTION OF THE NODAL NETWORK EQUATIONS
6.3 GENERATION AND SOLUTION OF THE NODAL NETWORK EQUATIONS
6.4 INCLUSION OF NON-LINEAR ELEMENTS
6.4 INCLUSION OF NON-LINEAR ELEMENTS
6.5 CONSTRUCTION OF NTAP2
6.5 CONSTRUCTION OF NTAP2
CHAPTER 7. The Computation of Layout Capacitances and Inductances
CHAPTER 7. The Computation of Layout Capacitances and Inductances
7.2 LAYOUT CAPACITANCES COMPUTATION (LOCCO)
7.2 LAYOUT CAPACITANCES COMPUTATION (LOCCO)
7.3 LAYOUT INDUCTANCES COMPUTATION (LINCOl)
7.3 LAYOUT INDUCTANCES COMPUTATION (LINCOl)
CHAPTER 8. The Graphic Display as a Drawing Aid for Circuit Layout
CHAPTER 8. The Graphic Display as a Drawing Aid for Circuit Layout
8.2 CONNECTION WITH LOCCO AND UNCO
8.2 CONNECTION WITH LOCCO AND UNCO
8.4 MASK GENERATION PROGRAM STRUCTURE
8.4 MASK GENERATION PROGRAM STRUCTURE
8.6 LADYJANE- USERS' FACILITIES
8.6 LADYJANE- USERS' FACILITIES
8.7. FUTURE EXTENSIONS AND OTHER TECHNIQUES
8.7. FUTURE EXTENSIONS AND OTHER TECHNIQUES
CHAPTER 9. An Approach to Writing Design Programs
CHAPTER 9. An Approach to Writing Design Programs
9.2 THE DESIGN OF A SINGLE STAGE TRANSISTOR AMPLIFIER
9.2 THE DESIGN OF A SINGLE STAGE TRANSISTOR AMPLIFIER
9.3 A DESIGN PROGRAM FOR A GAIN AND PHASE CORRECTED AMPLIFIER
9.3 A DESIGN PROGRAM FOR A GAIN AND PHASE CORRECTED AMPLIFIER
9.4 A SINGLE GAIN AND PHASE CORRECTED STAGE
9.4 A SINGLE GAIN AND PHASE CORRECTED STAGE
9.5 A PARAMETER OPTIMISING ALGORITHM (FINDIT)
9.5 A PARAMETER OPTIMISING ALGORITHM (FINDIT)
CHAPTER 10. Polynomial Manipulation
CHAPTER 10. Polynomial Manipulation
10.11 FUTURE DEVELOPMENTS
10.11 FUTURE DEVELOPMENTS