

Author: Jiménez R.
Publisher: Springer Publishing Company
ISSN: 0925-1030
Source: Analog Integrated Circuits and Signal Processing, Vol.33, Iss.2, 2002-11, pp. : 145-156
Disclaimer: Any content in publications that violate the sovereignty, the constitution or regulations of the PRC is not accepted or approved by CNPIEC.
Abstract
Related content








Low-power sequential circuit design using T flip-flops
International Journal of Electronics, Vol. 88, Iss. 6, 2001-06 ,pp. :


Layout Driven Selection and Chaining of Partial Scan Flip-Flops
By Chen C-S.
Journal of Electronic Testing, Vol. 13, Iss. 1, 1998-08 ,pp. :