Author: Vergos H. T. Tsiatouhas Y. Haniotakis Th. Nikolos D. Nicolaidis M.
Publisher: Taylor & Francis Ltd
ISSN: 1362-3060
Source: International Journal of Electronics, Vol.88, Iss.8, 2001-08, pp. : 923-937
Disclaimer: Any content in publications that violate the sovereignty, the constitution or regulations of the PRC is not accepted or approved by CNPIEC.
Abstract
Related content
BIST-Based Delay-Fault Testing in FPGAs
Journal of Electronic Testing, Vol. 19, Iss. 5, 2003-10 ,pp. :
Delay Fault Testing of Look-Up Tables in SRAM-Based FPGAs
Journal of Electronic Testing, Vol. 21, Iss. 1, 2005-02 ,pp. :
False-Path Removal Using Delay Fault Simulation
Journal of Electronic Testing, Vol. 16, Iss. 5, 2000-10 ,pp. :