Functional programming of real-time reconfigurable embedded systems

ISSN： 1741-1068

Source： International Journal of Embedded Systems, Vol.2, Iss.1-2, 2006-07, pp. : 106-113

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Abstract

Reconfigurable computing arrays will consist of mixtures of processors and discrete logic, which will greatly exacerbate the already difficult problems of hardware/software integration and the proper comprehension of time. An execution model and new language based on functional programming is proposed which removes the distinction between hardware and software and supports statically analysable real-time system design. The language is called 'V' because it can be viewed as the synthesisable subset of Verilog with additional functional programming features. The V compiler generates a net-list of the elementary functions, which are supported by a particular array. The full power of functional programming can be employed with the restriction that some recursive function definitions are executed only at instantiation time. The execution model is cycle based synchronous dataflow. V syntax looks much like Verilog or C without pointers in order to facilitate adoption.