Publisher： Trans Tech Publications
E-ISSN： 1662-8985|2014|1079|506-509
ISSN： 1022-6680
Source： Advanced Materials Research, Vol.2014, Iss.1079, 2015-02, pp. : 506-509
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Abstract
This work is focused on the 0.25 μm 60 V high-voltage pLDMOS deviceswhich will be integrated with an FOD structure in the bulk region, and its ESD protection ability is improved by using this architecture. It is found that as an FOD element adding, the FOD area ratio is increased, It2 value will be enhanced too. However, as the FOD area ratio is increased, the Vt1 value of thecorresponding sample is not changed so much about a range of 1 ~ 2V; at thesame time the Ron value will be declined, which were due to a uniformconduction phenomenon. From the experimental data,it is revealed that the It2value improved 15.4%, and Ron valuedecreased about 8.6%.
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