I2C and HSTL IO Standard Based Low Power Thermal Aware Adder Design on 45nm FPGA

Publisher: Trans Tech Publications

E-ISSN: 1662-8985|2015|1098|31-36

ISSN: 1022-6680

Source: Advanced Materials Research, Vol.2015, Iss.1098, 2015-05, pp. : 31-36

Disclaimer: Any content in publications that violate the sovereignty, the constitution or regulations of the PRC is not accepted or approved by CNPIEC.

Previous Menu Next

Abstract