Adaptative Techniques to Reduce Power in Digital Circuits

By Amrutur Bharadwaj   Mehta Nandish   Dwivedi Satyam   Gupte Ajit  

Journal of Low Power Electronics and Applications, Vol. 1, Iss. 2, 2011-07 ,pp. : 261-276

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A Sub-Threshold 8T SRAM Macro with 12.29 nW/KB Standby Power and 6.24 pJ/access for Battery-Less IoT SoCs

By Yahya Farah B.   Patel Harsh N.   Boley James   Banerjee Arijit   Calhoun Benton H.  

Journal of Low Power Electronics and Applications, Vol. 6, Iss. 2, 2016-05 ,pp. : 8-8

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Low Power Clock Network Design

By Vaisband Inna   Friedman Eby G.   Ginosar Ran   Kolodny Avinoam  

Journal of Low Power Electronics and Applications, Vol. 1, Iss. 1, 2011-05 ,pp. : 219-246

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Low Power Design for Future Wearable and Implantable Devices

By Lundager Katrine   Zeinali Behzad   Tohidi Mohammad   Madsen Jens K.   Moradi Farshad  

Journal of Low Power Electronics and Applications, Vol. 6, Iss. 4, 2016-10 ,pp. : 20-20

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Mastering the Art of High Mobility Material Integration on Si: A Path towards Power-Efficient CMOS and Functional Scaling

By Collaert Nadine  

Journal of Low Power Electronics and Applications, Vol. 6, Iss. 2, 2016-06 ,pp. : 9-9

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