0.5 µW Sub-Threshold Operational Transconductance Amplifiers Using 0.15 µm Fully Depleted Silicon-on-Insulator (FDSOI) Process

By Olejarz Piotr   Park Kyoungchul   MacNaughton Samuel   Dokmeci Mehmet R.   Sonkusale Sameer  

Journal of Low Power Electronics and Applications, Vol. 2, Iss. 2, 2012-05 ,pp. : 155-167

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Analyzing Sub-Threshold Bitcell Topologies and the Effects of Assist Methods on SRAM V_MIN

By Boley James   Wang Jiajing   Calhoun Benton H.  

Journal of Low Power Electronics and Applications, Vol. 2, Iss. 2, 2012-04 ,pp. : 143-154

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Sub-Threshold Standard Cell Sizing Methodology and Library Comparison

By Liu Bo   Pineda de Gyvez Jose   Ashouei Maryam  

Journal of Low Power Electronics and Applications, Vol. 3, Iss. 3, 2013-07 ,pp. : 233-249

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A Sub-Threshold 8T SRAM Macro with 12.29 nW/KB Standby Power and 6.24 pJ/access for Battery-Less IoT SoCs

By Yahya Farah B.   Patel Harsh N.   Boley James   Banerjee Arijit   Calhoun Benton H.  

Journal of Low Power Electronics and Applications, Vol. 6, Iss. 2, 2016-05 ,pp. : 8-8

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Short-Circuit Power Reduction by Using High-Threshold Transistors

By Morgenshtein Arkadiy  

Journal of Low Power Electronics and Applications, Vol. 2, Iss. 1, 2012-03 ,pp. : 69-78

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