Simulation Study of Low Dimensional Effects in Pitch-Scaled (90 nm Technology Node) High Electron Mobility Transistors for Very Large Scale Integration Applications

Author: Gomes Umesh P.   Takhar Kuldeep   Yadav Yogendra K.   Ranjan Kumud   Rathi Servin   Biswas Dhrubes  

Publisher: American Scientific Publishers

ISSN: 1555-1318

Source: Journal of Nanoelectronics and Optoelectronics, Vol.8, Iss.2, 2013-02, pp. : 170-176

Disclaimer: Any content in publications that violate the sovereignty, the constitution or regulations of the PRC is not accepted or approved by CNPIEC.

Previous Menu Next

Abstract