A 3-A CMOS low-dropout regulator with adaptive Miller compensation

Author： Lai Xinquan Guo Jianping Sun Zuozhi Xie Jianzhang

ISSN： 0925-1030

Source： Analog Integrated Circuits and Signal Processing, Vol.49, Iss.1, 2006-10, pp. : 5-10

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Abstract

A 3-A CMOS low-dropout regulator (LDO) is presented by utilizing adaptive Miller compensation (AMC) technique, which provides high stability, as well as fast line and load transient responses. The proposed LDO has been fabricated in a standard 0.5 m CMOS technology, and the die area is small as 1330 m × 1330 m with the area-efficient waffle layout for power transistors. Both load and line regulation are less than ±0.1%. And the output voltage can recover within 80 s for full load changes. The power–supply rejection ratio (PSRR) at 20 KHz is −30 dB. Moreover, it is stable enough with a ceramic capacitor small to 2.2 F, and the added series resistance is not needed.