Design methodology for systematic derivation of fault-tolerant processor array architectures

Author： Soudris D.   Poechmueller P.   Kyriakis-Bitzaros E. D.   Birbas M.   Goutis C.   Thanailakis A.  

Publisher： Taylor & Francis Ltd

ISSN： 1362-3060

Source： International Journal of Electronics, Vol.84, Iss.6, 1998-06, pp. : 615-624

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