An FPGA implementation for neural networks with the FDFM processor core approach

By Ago Yuki   Ito Yasuaki   Nakano Koji  

International Journal of Parallel, Emergent and Distributed Systems, Vol. 28, Iss. 4, 2013-08 ,pp. : 308-320

Taylor & Francis Ltd

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An efficient VLSI architecture and FPGA implementation of the Finite Ridgelet Transform

By Chandrasekaran Shrutisagar  

Journal of Real-Time Image Processing, Vol. 3, Iss. 3, 2008-09 ,pp. : 183-193

Springer Publishing Company

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Scheduling of Iterative Algorithms with Matrix Operations for Efficient FPGA Design—Implementation of Finite Interval Constant Modulus Algorithm

By Šůcha Přemysl   Hanzálek Zdeněk   Heřmánek Antonín   Schier Jan  

Journal of VLSI Signal Processing, Vol. 46, Iss. 1, 2007-01 ,pp. : 35-53

Springer Publishing Company

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An efficient low-cost FPGA implementation of a configurable motion estimation for H.264 video coding

By Elhamzi Wajdi   Dubois Julien   Miteran Johel   Atri Mohamed  

Journal of Real-Time Image Processing, Vol. 9, Iss. 1, 2014-03 ,pp. : 19-30

Springer Publishing Company

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A new design leads to efficient bit-serial FPGA implementation for the biorthogonal 5/3 DWT filter bank

By Abdul-Jabbar Jassim M.   Alkababji Ahmed M.   Alneema Dhafir A.  

International Journal of Reasoning-based Intelligent Systems, Vol. 4, Iss. 4, 2012-01 ,pp. : 256-259

Inderscience Publishers

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