Coefficient Elimination Algorithm for Low Energy Distributed Arithmetic DCT Architectures

ISSN： 0922-5773

Source： Journal of VLSI Signal Processing, Vol.40, Iss.3, 2005-07, pp. : 355-369

Disclaimer: Any content in publications that violate the sovereignty, the constitution or regulations of the PRC is not accepted or approved by CNPIEC.

Previous Menu Next

Abstract

Related content

Performance Analysis of the Parallel Karatsuba Multiplication Algorithm for Distributed Memory Architectures

By Cesari G. Maeder R.

Journal of Symbolic Computation, Vol. 21, Iss. 4, 1996-04 ,pp. : 467-473

Academic Press

Access to resources Recommend Favorite

A Parallel Algorithm for 4×4 DCT

By Jiang J.

Journal of Parallel and Distributed Computing, Vol. 57, Iss. 2, 1999-05 ,pp. : 257-269

Academic Press

Access to resources Recommend Favorite

A distributed energy efficient multicast routing algorithm for WANETs

By Zhao Sufen Tan Liansheng Li Jie

International Journal of Sensor Networks, Vol. 2, Iss. 1-2, 2007-04 ,pp. : 62-67

Inderscience Publishers

Access to resources Recommend Favorite

A distributed algorithm for energy-aware clustering in WSN

By Bagchi Susmit

International Journal of Sensor Networks, Vol. 7, Iss. 1-2, 2010-02 ,pp. : 37-43

Inderscience Publishers

Access to resources Recommend Favorite

Performance analysis of distributed symmetric sparse matrix vector multiplication algorithm for multi‐core architectures

CONCURRENCY AND COMPUTATION: PRACTICE & EXPERIENCE (ELECTRONIC), Vol. 27, Iss. 17, 2015-12 ,pp. : 5019-5036

John Wiley & Sons Inc

Access to resources Recommend Favorite