An 8-bit Folding A/D Converter with a New Interpolation Technique: ICECS'02 (Guest Editors: Malgorzata Chrzanowska-Jeske and Branimir Pejcinovic)

Author: Martins Evandro Mazina   Ferreira Elnatan Chagas  

Publisher: Springer Publishing Company

ISSN: 0925-1030

Source: Analog Integrated Circuits and Signal Processing, Vol.41, Iss.2-3, 2004-12, pp. : 237-252

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Abstract

This paper proposes a new interpolation technique for application in a folding A/D converter with interpolation. However, there is not a specific interpolation circuit because this interpolation technique is applied to the folding encoder circuit and to the master latches of the A/D converter. This interpolation technique adds some transistors in the folding encoder circuit, and it adds only three transistors to some master latches. An 8-bit A/D converter has been designed and implemented in a 0.8 μm BiCMOS process, at FT of 12 GHz to evaluate the proposed interpolation technique.

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