Design of an Efficient Charge‐Trapping Layer with a Built‐In Tunnel Barrier for Reliable Organic‐Transistor Memory

E-ISSN： 1521-4095|27|4|706-711

ISSN： 0935-9648

Source： ADVANCED MATERIALS, Vol.27, Iss.4, 2015-01, pp. : 706-711

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