An optimised 3D topology for on-chip communications

Author: Viswanathan N.   Paramasivam K.   Somasundaram K.  

Publisher: Taylor & Francis Ltd

ISSN: 1744-5760

Source: International Journal of Parallel, Emergent and Distributed Systems, Vol.29, Iss.4, 2014-07, pp. : 346-362

Disclaimer: Any content in publications that violate the sovereignty, the constitution or regulations of the PRC is not accepted or approved by CNPIEC.

Previous Menu Next