A single channel, 6-bit 230-MS/s asynchronous SAR ADC based on 2 bits/stage

By Xue Han   Qi Wei   Huazhong Yang   Hui Wang  

Journal of Semiconductors, Vol. 35, Iss. 7, 2014-07 ,pp. : 75005-75010

IOP Publishing

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A single channel, 6-bit 410-MS/s 3bits/stage asynchronous SAR ADC based on resistive DAC

By Xue Han   Qi Wei   Huazhong Yang   Hui Wang  

Journal of Semiconductors, Vol. 36, Iss. 5, 2015-05 ,pp. : 55010-55016

IOP Publishing

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A 90-nm CMOS, 8-bit pipeline ADC with 60-MHz bandwidth and 125-MS/s or 250-MS/s sampling frequency

By Malcovati Piero   Picolli Luca   Crespi Lorenzo   Chaahoub Faouzi   Baschirotto Andrea  

Analog Integrated Circuits and Signal Processing, Vol. 64, Iss. 2, 2010-08 ,pp. : 159-172

Springer Publishing Company

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A novel 8-bit 20-MS/s folded residue amplification based pipelined ADC

By Pashaeefar Masoud   Ashtiani Shahin  

Analog Integrated Circuits and Signal Processing, Vol. 79, Iss. 1, 2014-04 ,pp. : 177-182

Springer Publishing Company

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An analog front end with a 12-bit 3.2-MS/s SAR ADC for a power line communication system

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Journal of Semiconductors, Vol. 35, Iss. 11, 2014-11 ,pp. : 115008-115015

IOP Publishing

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