Static Test Compaction for Scan-Based Designs to Reduce Test Application Time

By Pomeranz I.  

Journal of Electronic Testing, Vol. 16, Iss. 5, 2000-10 ,pp. : 541-552

Springer Publishing Company

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Test Set and Fault Partitioning Techniques for Static Test Sequence Compaction for Sequential Circuits

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Journal of Electronic Testing, Vol. 16, Iss. 4, 2000-08 ,pp. : 329-338

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An efficient test generation for multiple fault coverage of two-rail checkers

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International Journal of Electronics, Vol. 83, Iss. 6, 1997-12 ,pp. : 837-848

Taylor & Francis Ltd

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Sequential Circuits with Combinational Test Generation Complexity under Single-Fault Assumption

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Journal of Electronic Testing, Vol. 18, Iss. 1, 2002-02 ,pp. : 55-62

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Fault Models and Test Generation for OpAmp Circuits—The FFM

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Journal of Electronic Testing, Vol. 17, Iss. 2, 2001-04 ,pp. : 121-138

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