Convergence Analysis of the Cascaded 2nd Order Dual Servo Loop Adaptive Line Equalizer

ISSN： 0925-1030

Source： Analog Integrated Circuits and Signal Processing, Vol.45, Iss.2, 2005-11, pp. : 183-190

Disclaimer: Any content in publications that violate the sovereignty, the constitution or regulations of the PRC is not accepted or approved by CNPIEC.

Previous Menu Next

Abstract

Related content

Dual-Mode Space-Temporal Simultaneous Processing Equalizer

By Ichikawa Yoshihiro Obote Shigeki Kagoshima Kenichi

Wireless Personal Communications, Vol. 35, Iss. 4, 2005-12 ,pp. : 353-364

Springer Publishing Company

Access to resources Recommend Favorite

A Novel Algorithm for Simple Hybrid of Adaptive Array and Equalizer

By Leou Maw-Lin

Wireless Personal Communications, Vol. 55, Iss. 4, 2010-12 ,pp. : 567-583

Springer Publishing Company

Access to resources Recommend Favorite

Analysis and optimisation of the convergence behaviour of the single channel digital tanlock loop

By Al-Ali Omar Al-Kharji

International Journal of Electronics, Vol. 100, Iss. 9, 2013-09 ,pp. : 1296-1308

Taylor & Francis Ltd

Access to resources Recommend Favorite

Design of a constant-voltage and constant-current controller with dual-loop and adaptive switching frequency control

By Yingping Chen Zhiqian Li

Journal of Semiconductors, Vol. 36, Iss. 5, 2015-05 ,pp. : 55004-55010

IOP Publishing

Access to resources Recommend Favorite

A Low Power Adaptive Equalizer for PRML Disk-Drive Read Channels

By Ki H.J.

Analog Integrated Circuits and Signal Processing, Vol. 34, Iss. 3, 2003-03 ,pp. : 211-220

Springer Publishing Company

Access to resources Recommend Favorite