Leakage Current Reduction Techniques for 7T SRAM Cell in 45 nm Technology

By Akashe Shyam  

Wireless Personal Communications, Vol. 71, Iss. 1, 2013-07 ,pp. : 123-136

Springer Publishing Company

Access to resources Recommend Favorite

Stability and leakage characteristics of novel conducting PMOS based 8T SRAM cell

By  

International Journal of Electronics, Vol. 101, Iss. 6, 2014-06 ,pp. : 831-848

Taylor & Francis Ltd

Access to resources Recommend Favorite

A proposed SRAM cell for low power consumption during write operation

By Prabhu C.M.R.   Singh Ajay Kumar  

Microelectronics International, Vol. 26, Iss. 1, 2009-01 ,pp. : 37-42

Emerald Group Publishing Ltd

Access to resources Recommend Favorite

A PD-SOI based DTI-LOCOS combined cross isolation technique for minimizing TID radiation induced leakage in high density memory

By Fengying Qiao   Liyang Pan   Dong Wu   Lifang Liu   Jun Xu  

Journal of Semiconductors, Vol. 35, Iss. 2, 2014-02 ,pp. : 24003-24008

IOP Publishing

Access to resources Recommend Favorite

High Current Integrated Microinductors and Microtransformers using Low Temperature Fabrication Processes*

By Park J.Y.   Allen M.G.  

Microelectronics International, Vol. 14, Iss. 3, 1997-03 ,pp. : 8-11

Emerald Group Publishing Ltd

Access to resources Recommend Favorite