A new design leads to efficient bit-serial FPGA implementation for the biorthogonal 5/3 DWT filter bank

Author: Abdul-Jabbar Jassim M.   Alkababji Ahmed M.   Alneema Dhafir A.  

Publisher: Inderscience Publishers

ISSN: 1755-0556

Source: International Journal of Reasoning-based Intelligent Systems, Vol.4, Iss.4, 2012-01, pp. : 256-259

Disclaimer: Any content in publications that violate the sovereignty, the constitution or regulations of the PRC is not accepted or approved by CNPIEC.

Previous Menu Next

Abstract