Bus encoder design for crosstalk and power reduction in RLC modelled VLSI interconnects

Author: VermaS.K.Department of Computer Science and Engineering   G.B. Pant Engineering College   Pauri-Garhwal   India   KaushikB.K.Department of Electronics and Communication Engineering   Indian Institute of Technology   Roorkee   India  

Publisher: Emerald Group Publishing Ltd

E-ISSN: 1758-8901|13|3|486-498

ISSN: 1726-0531

Source: Journal of Engineering, Design and Technology, Vol.13, Iss.3, 2015-07, pp. : 486-498

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