Analytical Modeling of Threshold Voltage and Drain-Induced-Barrier- Lowering Variations Due to Gate Length Fluctuation in Nanometer MOSFETs

Publisher: Bentham Science Publishers

ISSN: 2352-0965

Source: Recent Advances in Electrical & Electronic Engineering (Formerly Recent Patents on Electrical & Electronic Engineering), Vol.10, Iss.2, 2017-09, pp. : 128-133

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Abstract