Author： Sandström Dan
Publisher： Springer Publishing Company
ISSN： 0925-1030
Source： Analog Integrated Circuits and Signal Processing, Vol.64, Iss.3, 2010-09, pp. : 223-231
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Abstract
A three-stage V-band amplifier implemented in 65-nm baseline CMOS technology is presented in this paper. Slow-wave coplanar waveguides are used for matching and interconnects to study the benefits of using this line type in amplifier design. Measured power gain, noise figure and 1 dB output compression point at 60 GHz are 13 dB, 6.3 dB and +4 dBm, respectively. The amplifier has 19.6 GHz of 3 dB bandwidth, thus covering entirely the unlicensed band around 60 GHz. The performance is achieved with a 1.2 V supply and 45 mA DC current consumption.
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