International Journal of Embedded Systems,volume 5,issue 1-2  (02-2013)

Period of time： 2013年1-2期

Publisher： Inderscience Publishers

Founded in： 2005

Total resources： 13

ISSN： 1741-1068

Subject： TP Automation Technology , Computer Technology

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International Journal of Embedded Systems,volume 5,issue 1-2

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A highly efficient behavioural model of router for network-on-chip with link aggregation

By Korotkyi Ievgen,Lysenko Oleksandr in (2013)

International Journal of Embedded Systems,volume 5,issue 1-2 , Vol. 5, Iss. 1-2, 2013-02 , pp. 3-12

Inderscience Publishers

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Sphere-based topology for networks-on-chip

By Sabbaghi-Nadooshan Reza,Doroud Hossein,Ghorbanian Mahsa in (2013)

International Journal of Embedded Systems,volume 5,issue 1-2 , Vol. 5, Iss. 1-2, 2013-02 , pp. 13-18

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Acyclic LBDRe: fault-tolerant routing algorithm for network on chip

By Zinzuwadiya Amit in (2013)

International Journal of Embedded Systems,volume 5,issue 1-2 , Vol. 5, Iss. 1-2, 2013-02 , pp. 19-26

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Topologies and routing strategies in MPSoC

By Tyagi Shivam,Khan Mohammad Ayoub in (2013)

International Journal of Embedded Systems,volume 5,issue 1-2 , Vol. 5, Iss. 1-2, 2013-02 , pp. 27-35

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Low power clock gating techniques for synchronous buffer-based queue for 3D MPSoC

By Kathuria Jagrit in (2013)

International Journal of Embedded Systems,volume 5,issue 1-2 , Vol. 5, Iss. 1-2, 2013-02 , pp. 36-43

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Automated transistor width optimisation algorithms for digital circuits

By Tiwari Satish Chandra in (2013)

International Journal of Embedded Systems,volume 5,issue 1-2 , Vol. 5, Iss. 1-2, 2013-02 , pp. 44-52

Inderscience Publishers

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Design of a medium voltage protection device using system simulation approaches: a case study

By Rahmouni Khaled in (2013)

International Journal of Embedded Systems,volume 5,issue 1-2 , Vol. 5, Iss. 1-2, 2013-02 , pp. 53-66

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Applying partial fault tolerance with explicit area constraints

By Foster David L. in (2013)

International Journal of Embedded Systems,volume 5,issue 1-2 , Vol. 5, Iss. 1-2, 2013-02 , pp. 67-80

Inderscience Publishers

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Maximising area-constrained partial fault tolerance in reconfigurable logic using selection criteria

By Foster David L. in (2013)

International Journal of Embedded Systems,volume 5,issue 1-2 , Vol. 5, Iss. 1-2, 2013-02 , pp. 81-94

Inderscience Publishers

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Performance evaluation of platform-specific implementations of numerically complex control designs for nano-positioning applications

By Müller Marcus in (2013)

International Journal of Embedded Systems,volume 5,issue 1-2 , Vol. 5, Iss. 1-2, 2013-02 , pp. 95-105

Inderscience Publishers

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