Author： Zhen Xu Xueqing Li Jia'nan Liu Qi Wei Li Luo Huazhong Yang
Publisher： IOP Publishing
ISSN： 1674-4926
Source： Journal of Semiconductors, Vol.35, Iss.3, 2014-03, pp. : 35008-35013
Disclaimer: Any content in publications that violate the sovereignty, the constitution or regulations of the PRC is not accepted or approved by CNPIEC.
Related content
A 14-bit 100-MS/s 85.2-dB SFDR pipelined ADC without calibration
By Nan Zhao Hua Luo Qi Wei Huazhong Yang
Journal of Semiconductors, Vol. 35, Iss. 7, 2014-07 ,pp. :
Access to resources
Recommend
A 14-bit 50 MS/s sample-and-hold circuit for pipelined ADC
By Sen Yue Yiqiang Zhao Ruilong Pang Yun Sheng
Journal of Semiconductors, Vol. 35, Iss. 5, 2014-05 ,pp. :
14-bit 100 MS/s 121 mW pipelined ADC
By Yongzhen Chen Chixiao Chen Zemin Feng Fan Ye Junyan Ren
Journal of Semiconductors, Vol. 36, Iss. 6, 2015-06 ,pp. :
An IP-oriented 11-bit 160 MS/s 2-channel current-steering DAC
Journal of Semiconductors, Vol. 35, Iss. 12, 2014-12 ,pp. :