Simultaneous order-lot pegging and wafer release planning for semiconductor wafer fabrication facilities

Author： Lim Seung-Kil   Kim Jae-Gon   Kim Hwa-Joong  

Publisher： Taylor & Francis Ltd

ISSN： 0020-7543

Source： International Journal of Production Research, Vol.52, Iss.12, 2014-06, pp. : 3710-3724

Disclaimer: Any content in publications that violate the sovereignty, the constitution or regulations of the PRC is not accepted or approved by CNPIEC.

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