The Design and Implementation of a Low-Power Gating Scan Element in 32/28 nm CMOS Technology

Author： Naeini Mahshid Mojtabavi   Dass Sreedharan Baskara   Ooi Chia Yee  

Publisher： MDPI

E-ISSN： 2079-9268|7|2|7-7

ISSN： 2079-9268

Source： Journal of Low Power Electronics and Applications, Vol.7, Iss.2, 2017-04, pp. : 7-7

Access to resources Favorite

Disclaimer: Any content in publications that violate the sovereignty, the constitution or regulations of the PRC is not accepted or approved by CNPIEC.

Previous Menu Next

Abstract

Related content

Untrimmed Low-Power Thermal Sensor for SoC in 22 nm Digital Fabrication Technology

By Eitan Ro’ee   Cohen Ariel  

Journal of Low Power Electronics and Applications, Vol. 4, Iss. 4, 2014-12 ,pp. : 304-316

MDPI

Access to resources Recommend Favorite

Robust and Energy-Efficient Ultra-Low-Voltage Circuit Design under Timing Constraints in 65/45 nm CMOS

By Bol David  

Journal of Low Power Electronics and Applications, Vol. 1, Iss. 1, 2011-01 ,pp. : 1-19

MDPI

Access to resources Recommend Favorite

Ultra Low-Power Algorithm Design for Implantable Devices: Application to Epilepsy Prostheses

By Raghunathan Shriram   Gupta Sumeet K.   Markandeya Himanshu S.   Irazoqui Pedro P.   Roy Kaushik  

Journal of Low Power Electronics and Applications, Vol. 1, Iss. 1, 2011-05 ,pp. : 175-203

MDPI

Access to resources Recommend Favorite

CMOS-NEMS Copper Switches Monolithically Integrated Using a 65 nm CMOS Technology

By Muñoz-Gamarra Jose Luis   Uranga Arantxa   Barniol Nuria  

Micromachines, Vol. 7, Iss. 2, 2016-02 ,pp. : 30-30

MDPI

Access to resources Recommend Favorite

Using a Voltage Domain Programmable Technique for Low-Power Management Cell-Based Design

By Cheng Ching-Hwa  

Journal of Low Power Electronics and Applications, Vol. 1, Iss. 2, 2011-09 ,pp. : 303-326

MDPI

Access to resources Recommend Favorite