Author： Filanovsky I. M.
Publisher： Taylor & Francis Ltd
ISSN： 1362-3060
Source： International Journal of Electronics, Vol.82, Iss.5, 1997-05, pp. : 527-532
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Abstract
This paper describes a self-biased MOS transistor circuit with the ground referenced output voltage equal to the threshold voltage V . The circuit employs a series connection of three transistors where the middle transistor is in linear operation and external transistors are in saturation. The circuit can be applied for V extraction of both n-channel and p-channel transistors. The range of currents for better measuring of V in each case is established by simulation.
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