Author： Wang W. Y. Lau K. T.
Publisher： Taylor & Francis Ltd
ISSN： 1362-3060
Source： International Journal of Electronics, Vol.84, Iss.6, 1998-06, pp. : 589-594
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Abstract
A new adiabatic or energy recovery logic structure is presented in this circuit uses only one NMOS for precharge instead of two diodes as in previous circuits. Comparisons with previous circuits were carried out in terms of power dissipation, operating frequency and layout area. The results show that the proposed circuit can save around 20% of area in layout implementation with comparable power savings. The advantages of the proposed circuit have been confirmed by HSPICE simulations and layout design.
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