Dual-rail improved adiabatic pseudo-domino logic with auxiliary clock: a low-power partially-adiabatic CMOS logic family

Author： Tan W.M. Lau K.T.

Publisher： Emerald Group Publishing Ltd

ISSN： 1356-5362

Source： Microelectronics International, Vol.20, Iss.2, 2003-05, pp. : 16-18

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