On the speed-up of lock up time in the PLL frequency synthesizer

By Sumi Yasuaki   Obote Shigeki   Tsuda Kazutoshi   Syoubu Kouichi   Fukui Yutaka  

International Journal of Electronics, Vol. 84, Iss. 2, 1998-02 ,pp. : 123-130

Taylor & Francis Ltd

Access to resources Recommend Favorite

Body effect up- and down-conversion mixer circuits for low-voltage ultra-wideband operation

By Schmitz Oliver  

Analog Integrated Circuits and Signal Processing, Vol. 64, Iss. 3, 2010-09 ,pp. : 233-240

Springer Publishing Company

Access to resources Recommend Favorite

Up- and Downlink Admission/Congestion Control and Maximal Load in Large Homogeneous CDMA Networks: Optimization of Wireless & Mobile Networks (Guest Editors: Sven Östring, Konstantin Avrachenkov, Jon Crowcroft and Anthony Ephremides)

By Baccelli François   Błaszczyszyn Bartłomiej   Karray Mohamed Kadhem  

Mobile Networks and Applications, Vol. 9, Iss. 6, 2004-12 ,pp. : 605-617

Springer Publishing Company

Access to resources Recommend Favorite

A new phase detection method for a phase lock loop

By Wu Kuen-Der   Jou Hurng-Liahng  

International Journal of Electronics, Vol. 86, Iss. 11, 1999-11 ,pp. : 1359-1366

Taylor & Francis Ltd

Access to resources Recommend Favorite

Load characterization during transportation

By Ramakrishnan A.   Pecht M.  

Microelectronics Reliability, Vol. 44, Iss. 2, 2004-02 ,pp. : 333-338

Elsevier

Access to resources Recommend Favorite