Electrical and Mechanical Properties of Through-Silicon Vias and Bonding Layers in Stacked Wafers for 3D Integrated Circuits

Author: Hwang Sung-Hwan  

Publisher: Springer Publishing Company

ISSN: 1543-186X

Source: Journal of Electronic Materials, Vol.41, Iss.2, 2012-02, pp. : 232-240

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Abstract