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Period of time: 2013年1-2期
Publisher: Inderscience Publishers
Founded in: 2005
Total resources: 13
ISSN: 1741-1068
Subject: TP Automation Technology , Computer Technology
Disclaimer: Any content in publications that violate the sovereignty, the constitution or regulations of the PRC is not accepted or approved by CNPIEC.
International Journal of Embedded Systems,volume 1,issue 1-2
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By Fei Yunsi,Jha Niraj K. in (2006)
International Journal of Embedded Systems,volume 1,issue 1-2 , Vol. 1, Iss. 1-2, 2006-01 , pp.![](/images/ico/ico5.png)
A methodology for validation of microprocessors using symbolic simulation
By Mishra Prabhat,Dutt Nikil,Krishnamurthy Narayanan,Abadir Magdy in (2006)
International Journal of Embedded Systems,volume 1,issue 1-2 , Vol. 1, Iss. 1-2, 2006-01 , pp.![](/images/ico/ico5.png)
A platform based SOC design methodology and its application in image compression
By Jan Kai-Yuan,Fan Chih-Bin,Kuo An-Chao,Yen Wen-Chi,Lin Youn-Long in (2006)
International Journal of Embedded Systems,volume 1,issue 1-2 , Vol. 1, Iss. 1-2, 2006-01 , pp.![](/images/ico/ico5.png)
Performance analysis for complex embedded applications
By Jersak Marek,Richter Kai,Ernst Rolf in (2006)
International Journal of Embedded Systems,volume 1,issue 1-2 , Vol. 1, Iss. 1-2, 2006-01 , pp.![](/images/ico/ico5.png)
Adaptive smart antennae receiver controlled by a hardware-based genetic optimiser
By Kokai Gabriella,Fruhauf Hans Holm,Xu Feng in (2006)
International Journal of Embedded Systems,volume 1,issue 1-2 , Vol. 1, Iss. 1-2, 2006-01 , pp.![](/images/ico/ico5.png)
CoreMap: a rapid prototyping environment for distributed reconfigurable systems
International Journal of Embedded Systems,volume 1,issue 1-2 , Vol. 1, Iss. 1-2, 2006-01 , pp.![](/images/ico/ico5.png)
A system-level framework for designing and evaluating protocol processor architectures
By Virtanen Seppo,Nurmi Tero,Paakkulainen Jani,Lilius Johan in (2006)
International Journal of Embedded Systems,volume 1,issue 1-2 , Vol. 1, Iss. 1-2, 2006-01 , pp.![](/images/ico/ico5.png)
Energy-efficient hardware/software co-synthesis for a class of applications on reconfigurable SoCs
By Ou Jingzhao,Choi Seonil B.,Prasanna Viktor K. in (2006)
International Journal of Embedded Systems,volume 1,issue 1-2 , Vol. 1, Iss. 1-2, 2006-01 , pp.![](/images/ico/ico5.png)
ChronoSym: a new approach for fast and accurate SoC cosimulation
By Bacivarov Iuliana,Bouchhima Aimen,Yoo Sungjoo,Jerraya Ahmed A. in (2006)
International Journal of Embedded Systems,volume 1,issue 1-2 , Vol. 1, Iss. 1-2, 2006-01 , pp.![](/images/ico/ico5.png)
By Zergainoh Nacer-Eddine,Baghdadi Amer,Jerraya Ahmed in (2006)
International Journal of Embedded Systems,volume 1,issue 1-2 , Vol. 1, Iss. 1-2, 2006-01 , pp.