Journal of Electronic Testing,volume 22,issue 1  (02-2014)

Period of time： 2014年1期

Publisher： Springer Publishing Company

Founded in： 1990

Total resources： 50

ISSN： 0923-8174

Subject： TN Radio Electronics, Telecommunications Technology

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Journal of Electronic Testing,volume 22,issue 1

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Editorial

By Agrawal Vishwani in (2006)

Journal of Electronic Testing,volume 22,issue 1 , Vol. 22, Iss. 1, 2006-02 , pp. 5-5

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Test Technology Newsletter

By in (2006)

Journal of Electronic Testing,volume 22,issue 1 , Vol. 22, Iss. 1, 2006-02 , pp. 7-8

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New JETTA Editors, 2006

By Al-Hashimi Bashir,Gizopoulos Dimitris,Sachdev Manoj,Singh Adit in (2006)

Journal of Electronic Testing,volume 22,issue 1 , Vol. 22, Iss. 1, 2006-02 , pp. 9-10

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Scaling of i DDT Test Methods for Random Logic Circuits

By Chehab Ali in (2006)

Journal of Electronic Testing,volume 22,issue 1 , Vol. 22, Iss. 1, 2006-02 , pp. 11-22

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Theorems for Fault Collapsing in Combinational Circuits

By Vaaje Audhild in (2006)

Journal of Electronic Testing,volume 22,issue 1 , Vol. 22, Iss. 1, 2006-02 , pp. 23-36

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An Efficient Dictionary Organization for Maximum Diagnosis

By Chun Sunghoon in (2006)

Journal of Electronic Testing,volume 22,issue 1 , Vol. 22, Iss. 1, 2006-02 , pp. 37-48

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Optimization of Test/Diagnosis/Rework Location(s) and Characteristics in Electronic System Assembly

By Shi Zhen in (2006)

Journal of Electronic Testing,volume 22,issue 1 , Vol. 22, Iss. 1, 2006-02 , pp. 49-60

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Automatic Test Pattern Generation for Resistive Bridging Faults

By Engelke Piet in (2006)

Journal of Electronic Testing,volume 22,issue 1 , Vol. 22, Iss. 1, 2006-02 , pp. 61-69

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A Self Test Program Design Technique for Embedded DSP Cores

By Rizk Hani,Papachristou Chris,Wolff Francis in (2006)

Journal of Electronic Testing,volume 22,issue 1 , Vol. 22, Iss. 1, 2006-02 , pp. 71-87

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A Gated Clock Scheme for Low Power Testing of Logic Cores

By Bonhomme Yannick in (2006)

Journal of Electronic Testing,volume 22,issue 1 , Vol. 22, Iss. 1, 2006-02 , pp. 89-99

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