Deep-submicrometre fully-depleted SOI MOSFET drain current model for digital/analogue circuit simulation

By Hu Man-Chun   Jang Sheng-Lyang  

International Journal of Electronics, Vol. 84, Iss. 3, 1998-03 ,pp. : 167-185

Taylor & Francis Ltd

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Modelling for the current-voltage characteristics of SOI submicrometre gate controlled hybrid transistors

By Huang Ru   Han Ru Qi   Wang Yang Yuan   Ko Ping K.  

International Journal of Electronics, Vol. 88, Iss. 3, 2001-03 ,pp. : 287-300

Taylor & Francis Ltd

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Low-frequency noise measurements on submicrometre n-channel and p-channel MOSFETs at various operating regions

By Belahrach H.   Degerli Y.   Lavernhe F.   Karim M.   Magnan P.   Farre J.  

International Journal of Electronics, Vol. 88, Iss. 4, 2001-04 ,pp. : 411-421

Taylor & Francis Ltd

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Optimization of submicrometre GaAs MESFET for improved performance

By Chhokra Sunita A.   Gupta R. S.  

International Journal of Electronics, Vol. 85, Iss. 2, 1998-08 ,pp. : 129-144

Taylor & Francis Ltd

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Simulation of the substrate current in MOSFETs using a unified model for the Auger generation and recombination rate

By Ishihara T.   Enda T.   Matsuzawa K.  

Solid-State Electronics, Vol. 48, Iss. 3, 2004-03 ,pp. : 453-459

Elsevier

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