Related content

Breakdown and reliability of p-MOS devices with stacked RPECVD oxide/nitride gate dielectric under constant voltage stress

By Lee Y.-M.   Wu Y.   Lucovsky G.  

Microelectronics Reliability, Vol. 44, Iss. 2, 2004-02 ,pp. : 207-212

Elsevier

Access to resources Recommend Favorite

ESD robustness concern and optimization for high-voltage p-type LDMOS transistor with thin gate oxide used as the output driver

By Liu Siyang   Wang Hao   Ye Ran   Zhang Chunwei   Sun Weifeng  

Semiconductor Science and Technology, Vol. 29, Iss. 11, 2014-11 ,pp. : 115004-115010

IOP Publishing

Access to resources Recommend Favorite

VOLTAGE-CONTROLLED SMALL SIGNAL ANALYSIS OF REAL SPACE TRANSFER TRANSISTOR

By YARN K. F.  

Active and Passive Electronic Components, Vol. 26, Iss. 1, 2003-01 ,pp. : 51-62

Taylor & Francis Ltd

Access to resources Recommend Favorite

Influence of back-gate stress on the back-gate threshold voltage of a LOCOS-isolated SOIMOSFET

By Bo Mei   Jinshun Bi   Duoli Li   Sinan Liu   Zhengsheng Han  

Journal of Semiconductors, Vol. 33, Iss. 2, 2012-02 ,pp. : 24002-24006

IOP Publishing

Access to resources Recommend Favorite

Fast power cycling test for insulated gate bipolar transistor modules in traction application

By Held M.   Jacob P.   Nicoletti G.   Scacco P.   Poech M.-H.  

International Journal of Electronics, Vol. 86, Iss. 10, 1999-10 ,pp. : 1193-1204

Taylor & Francis Ltd

Access to resources Recommend Favorite