A new method to extract the effective trap density at the buried oxide/underlying substrate interface in enhancement-mode SOI MOSFETs at low temperatures

Publisher： Edp Sciences

E-ISSN： 1764-7177|08|PR3|Pr3-45-Pr3-48

ISSN： 1155-4339

Source： Le Journal de Physique IV, Vol.08, Iss.PR3, 1998-06, pp. : Pr3-45-Pr3-48

Disclaimer: Any content in publications that violate the sovereignty, the constitution or regulations of the PRC is not accepted or approved by CNPIEC.

Previous Menu Next

Related content

Analysis of the substrate effect on enhancement-mode SOI nMOSFET effective channel length and series resistance extraction at 77 K

By  

Le Journal de Physique IV, Vol. 08, Iss. PR3, 1998-06 ,pp. : Pr3-49-Pr3-52

Edp Sciences

Access to resources Recommend Favorite

Low frequency noise and radiation response in the partially depleted SOI MOSFETs with ion implanted buried oxide

By Yuan Liu   Hai-Bo Chen   Yu-Rong Liu   Xin Wang   Yun-Fei En   Bin Li   Yu-Dong Lu  

Chinese Physics B, Vol. 24, Iss. 8, 2015-08 ,pp. : 88503-88508

IOP Publishing

Access to resources Recommend Favorite

Back gate voltage and buried-oxide thickness influences on the series resistance of fully depleted SOI MOSFETs at 77 K

By  

Le Journal de Physique IV, Vol. 08, Iss. PR3, 1998-06 ,pp. : Pr3-25-Pr3-28

Edp Sciences

Access to resources Recommend Favorite

Effect of interface state trap density on the performance of scaled surface channel In0.3Ga0.7 As MOSFETs

By  

Journal of Physics: Conference Series , Vol. 193, Iss. 1, 2009-11 ,pp. : 492-495

IOP Publishing

Access to resources Recommend Favorite

Theoretical and Experimental Study of the Substrate Effect on the Fully Depleted SOI MOSFET at Low Temperatures

By  

Le Journal de Physique IV, Vol. 06, Iss. C3, 1996-04 ,pp. : C3-67-C3-72

Edp Sciences

Access to resources Recommend Favorite