Direct measurement of residual stress in integrated circuit interconnect features

Author： Horsfall A.B. dos Santos J.M.M. Soare S.M. Wright N.G. O'Neill A.G. Bull S.J. Walton A.J. Gundlach A.M. Stevenson J.T.M.

Publisher： Elsevier

ISSN： 0026-2714

Source： Microelectronics Reliability, Vol.43, Iss.9, 2003-09, pp. : 1797-1801

Disclaimer: Any content in publications that violate the sovereignty, the constitution or regulations of the PRC is not accepted or approved by CNPIEC.

Previous Menu Next

Abstract

Related content

A sample-and-hold current measurement integrated circuit for neural recording

By Ang S. S.

International Journal of Electronics, Vol. 93, Iss. 12, 2006-12 ,pp. : 793-803

Taylor & Francis Ltd

Access to resources Recommend Favorite

New Challenges for Integrated Circuit Solutions

By Soerensen J.

Wireless Personal Communications, Vol. 17, Iss. 2-3, 2001-06 ,pp. : 291-302

Springer Publishing Company

Access to resources Recommend Favorite

Current monitoring circuit for fault detection in CMOS integrated circuit

By Kim Jeong Beom

International Journal of Electronics, Vol. 95, Iss. 10, 2008-01 ,pp. : 999-1007

Taylor & Francis Ltd

Access to resources Recommend Favorite

Strategies for ultralow- dielectrics for integrated-circuit interconnects

By Cerofolini G.F.

Materials Science in Semiconductor Processing, Vol. 5, Iss. 2, 2002-04 ,pp. : 265-270

Elsevier

Access to resources Recommend Favorite

A low-power RF integrated circuit for implantable sensors

By Adeeb Mohammad Nguyen Hung Islam Syed Zhang Mo

Analog Integrated Circuits and Signal Processing, Vol. 47, Iss. 3, 2006-06 ,pp. : 355-363

Springer Publishing Company

Access to resources Recommend Favorite